The present invention relates to a vertical semiconductor component with source-down design and a corresponding fabrication method.
DE 196 38 439 A1 discloses a field effect-controllable, vertical semiconductor component, comprising a semiconductor body with at least one drain region of the first conduction type, at least one source region of the first conduction type, at least one body region of the second conduction type between drain region and source region, and at least one gate electrode which is insulated from the entire semiconductor body by a gate oxide, the gate terminal and drain terminal being situated on the front side of the wafer and the source terminal being situated on the rear side of the wafer.
Although applicable to any semiconductor components, he present invention and the problems on which it is based will be explained with regard to vertical source-down power transistors.
Source-down power transistors in the form of individual switches and in the form of integrated multiple switches (with common source=common source terminal) afford advantages of a circuitry and thermal nature.
One problem in their fabrication is that the source region and the body region, which are buried in the silicon, must be short-circuited to ensure that the parasitic bipolar transistor does not switch on.
It is an object of the present invention, therefore, to provide a semiconductor component of the type mentioned in the introduction in which the short circuit between source region and body region can be fabricated favorably in terms of process engineering. A further object is to provide a corresponding fabrication method.
According to the invention, this object is achieved by means of the semiconductor component specified in claim 1 and, respectively, by means of the fabrication method specified in claim 6.
The idea underlying the present invention consists in realizing the semiconductor component as a trench component, the trench containing the gate electrode. The short circuit between body region and source region is realized in the lower region of the trench, in which case, instead of the substrate, an additional, preferably implanted region serves as source region which is short-circuited with the substrate and the body region, for example via a silicide.
In this case, it is expedient to provide a process sequence which produces insulation of the gate from the short circuit between body region and source region and also thicker insulation in the upper part of the trench with respect to the insulation between drain and gate.
One advantage of the configuration according to the invention is that the short circuit between body region and source region is realized in a space-saving manner in the lower region of the trench.
Advantageous developments and improvements of the semiconductor component specified in claim 1 and, respectively, of the fabrication method specified in claim 6 may be found in the subclaims.
In accordance with a preferred development, at least one of the first, second and third layers (20, 30, 40 is an epitaxial layer.
In accordance with a further preferred development, the source region (130) is an implantation region.
In accordance with a further preferred development, the conductive layer (120) is a silicide layer.
In accordance with a further preferred development, the silicide layer is produced by depositing a metal, preferably tungsten, in the trench and thermal siliciding.
In accordance with a further preferred development, the first conduction type is the n conduction type.
In accordance with a further preferred development, the second layer (30) is formed by implantation into the bottom of the trench and outdiffusion prior to the source implantation.
Exemplary embodiments of the invention are illustrated in the drawings and explained in more detail in the description below.